This invention relates to reducing switching losses in switching power supplies.
There are many known DC-DC pulse-width-modulated (“PWM”) converter topologies. For example, FIGS. 1, 2, and 3 show, respectively, a non-isolated buck 10, boost 20, and buck-boost 30 converter. As shown, each converter has an input for receiving power from a unipolar input source, e.g. voltage source, Vin; one or more switches, i.e. switches S1 through S4; and an inductive element, L. In each of the topologies, the converter output voltage, Vo, or the converter output current may be controlled by controlling the timing of the ON and OFF intervals of the switches during each of a series of converter operating cycles. In some embodiments, some of the switches may be replaced by diodes, e.g., switches S2 and S3 in FIGS. 1, 2 and 3 may be replaced by diodes; or the switches may be supplemented by a diode connected across the switch, such as the intrinsic body drain diode of a MOSFET used as a switch.
In a “continuous” mode of operation a PWM converter may be configured and controlled so that, over a range of input voltage and load conditions, the current in the inductive element flows continuously in one direction during each converter operating cycle. Referring to FIG. 4, an idealized waveform of the current, IL, flowing in an inductive element of an idealized buck 10 (or boost 20) converter is shown operating in a continuous mode. (The idealized converters assume no losses, ideal switches, and no parasitic capacitances or inductances.) The operating cycle of the converter is shown having a period, Top. During the time interval T1, switch S1 (S4) is ON and switch S2 (S3) is OFF. During the interval T2, switch S1 (S4) is OFF and switch S2 (S3) is ON. As shown in FIG. 4, the current IL remains positive and greater than zero throughout the converter operating cycles.
In a non-idealized converter (real switches, parasitic capacitances and inductances, and losses) operating in continuous mode, a delay may be provided after the turning OFF of a first switch (e.g., switch S1, FIG. 1; switch S4, FIG. 2) in order to allow the current, IL, flowing in the inductive element to charge and discharge parasitic and circuit capacitances so that the subsequent turning ON of a second switch (e.g., switch S2, FIG. 1; switch S3, FIG. 2) may occur at a reduced, or at substantially zero, voltage, substantially reducing or eliminating switching losses in the second switch. Because of the unidirectional polarity of the inductive element current, however, it may not be possible to exploit the flow of inductive element current to reduce or eliminate switching loss in the first switch.
In a “discontinuous” mode of operation, a PWM converter may be configured and controlled so that the current, IL, flowing in the inductive element returns to zero or reverses polarity during each converter operating cycle. Referring to FIG. 5, an idealized waveform shows the current, IL, flowing in the inductive element of an idealized (ideal switches, no parasitic capacitances or inductances, and no losses) buck 10 or boost 20 converter (FIGS. 1, 2) operating in discontinuous mode with a converter operating cycle having a period, Top. During the time interval T1, switch S1 (S4) is ON and switch S2 (S3) is OFF. Conversely, during time interval, T2, switch S1 (S4) is OFF and switch S2 (S3) is ON. Both switches are OFF during the time interval T3. As shown in FIG. 5, the current, IL, is positive for a portion of each operating cycle and returns to zero prior to the end of the operating cycle.
Using a switch to retain energy in an inductive element as a means of reducing noise and switching losses in switching power converters is described in Prager et al, Loss and Noise Reduction in Power Converters, U.S. Reissue Pat. No. Re 40,072, assigned to VLT Corp. and incorporated here by reference in its entirety (the “072 Patent”). FIGS. 6 and 7 respectively illustrate a boost converter 100 and a buck converter 110 of the kind described in the 072 Patent. As shown, each converter includes a clamp circuit 102 (including clamp switch 103 and a diode 105) connected across its respective inductive element 104, 106. In operation, the inductor current in each converter declines after the first switch 112, 114 is turned OFF (interval T2, FIG. 5). Non-ideal diodes 108 and 116 continue to conduct for a short time after the inductor current declines to zero at time to (FIG. 5) (e.g. due to non-ideal diode reverse recovery and capacitance characteristics) allowing the inductor current to reverse polarity. As a result, a negative inductor current will be flowing when the diode stops conducting. The clamp switch being ON when the diode ceases conducting, traps the energy (the negative current) in the inductive element (e.g., during the time interval t3, FIG. 5) and when opened a short time prior to turning ON the first switch 112, 114, allows the trapped energy (i.e. the negative inductor current) to charge and discharge the parasitic capacitances, Cp 111, 113, reducing the voltage across the first switch before it is turned ON.
A buck-boost converter incorporating switches to retain energy in an inductive element and control techniques for operating the converter is described in Vinciarelli, Buck-Boost DC-DC Switching Power Conversion, U.S. Pat. Nos. 6,788,033 and 7,154,250, both assigned to VLT Corp. and incorporated here by reference in their entirety (the “ZVS Buck-Boost” patents). An isolated buck-boost converter that includes both an active clamp circuit and a clamp phase, in which all of the power switches in the converter may be switched ON at zero-voltage thereby reducing switching losses is described in Vinciarelli, Double-Clamped ZVS Buck-Boost Power Converter, U.S. Pat. No. 7,561,446 assigned to VLT Corp. and incorporated here by reference in its entirety (the “Double-Clamped Patent”).
Controlling switches in a buck or a boost converter until the current in an inductive element reaches a positive upper limit and reverses to a negative lower limit wherein the average output current is controlled and exploiting the flow of reversed current to achieve zero-voltage switching, is disclosed in Kuan, Zero Voltage Switch Method for Synchronous Rectifier and Inverter, U.S. Patent Application 2007/0109822.